In a flash memory device (for example, with NAND architecture), memory cells are grouped in strings, with each string including a set of transistors connected in series between a drain select transistor, connected to a bit line of the memory block, and a source select transistor, connected to a reference voltage distribution line. Each memory cell may include a floating-gate MOS transistor. When programming a memory cell, electrons are injected into the floating-gate, for example, by means of Fowler-Nordheim (F-N) Tunneling. The non-volatility of the cell is due to the electrons maintained within the floating-gate. Bits are stored by trapping charge on the floating gate (an electrically isolated conductor) which stores a logic value defined by its threshold voltage (read threshold) commensurate with the electric charge stored. When the cell is erased, the electrons in the floating gate are removed by quantum tunneling (a tunnel current) from the floating gate to, for example, the source and/or substrate.